Renesas 4514 - Manual (Page 33)

1-20
HARDWARE
4513/4514 Group User’s Manual
FUNCTION BLOCK OPERATIONS
PROGRAM MEMOY (ROM)
The program memory is a mask ROM. 1 word of ROM is composed
of 10 bits. ROM is separated every 128 words by the unit of page
(addresses 0 to 127). Table 1 shows the ROM size and pages. Fig-
ure 10 shows the ROM map of M34514M8/E8.
Table 1 ROM size and pages
Product
M34513M2
M34513M4/E4
M34513M6
M34513M8/E8
M34514M6
M34514M8/E8
ROM size
( ✕ 10 bits)
2048 words
4096 words
6144 words
8192 words
6144 words
8192 words
Pages
16 (0 to 15)
32 (0 to 31)
48 (0 to 47)
64 (0 to 63)
48 (0 to 47)
64 (0 to 63)
A part of page 1 (addresses 0080 16 to 00FF 16 ) is reserved for in-
terrupt addresses (Figure 11). When an interrupt occurs, the
address (interrupt address) corresponding to each interrupt is set
in the program counter, and the instruction at the interrupt address
is executed. When using an interrupt service routine, write the in-
struction generating the branch to that routine at an interrupt
address.
Page 2 (addresses 0100 16 to 017F 16 ) is the special page for sub-
routine calls. Subroutines written in this page can be called from
any page with the 1-word instruction (BM). Subroutines extending
from page 2 to another page can also be called with the BM in-
struction when it starts on page 2.
ROM pattern (bits 7 to 0) of all addresses can be used as data ar-
eas with the TABP p instruction.
Fig. 10 ROM map of M34514M8/E8
Fig. 11 Page 1 (addresses 0080 16 to 00FF 16 ) structure
9 0 8 7 6 5 4 3 2 1
External 0 interrupt address
External 1 interrupt address
0080 16
0082 16
Timer 1 interrupt address 0084 16
Timer 2 interrupt address 0086 16
Timer 3 interrupt address 0088 16
008A 16
00FF 16
Timer 4 interrupt address
A-D interrupt address
Serial I/O interrupt address
008C 16
008E 16
0 8 7 6 5 4 3 2 1
0000 16
0080 16
017 F 16
Subroutine special page
007 F 16
00 FF 16
0100 16
1 FFF 16
0180 16
Page 1
Page 2
Page 0
Page 3
Page 31 0 FFF 16
Interrupt address page
Page 63
9