Renesas 4514 - Manual (Page 128)

APPLICATION
2.2 Interrupts
2-25 4513/4514 Group User’s Manual
2.2.4 Notes on use
(1) Setting of INT0 interrupt valid waveform
Depending on the input state of P3
0 /INT0 pin, the external interrupt request flag (EXF0) may be set
to “1” when the interrupt valid waveform is changed. Accordingly, set a value to the bit 2 of register
I1, and execute the SNZ0 instruction to clear the EXF0 flag to “0” after executing at least one
instruction.
(2) Setting of INT1 interrupt valid waveform
Depending on the input state of P3
1 /INT1 pin, the external interrupt request flag (EXF1) may be set
to “1” when the interrupt valid waveform is changed. Accordingly, set a value to the bit 2 of register
I2, and execute the SNZ1 instruction to clear the EXF1 flag to “0” after executing at least one
instruction.
(3) Multiple interrupts
Multiple interrupts cannot be used in the 4513/4514 Group.
(4) Notes on interrupt processing
When the interrupt occurs, at the same time, the interrupt enable flag INTE is cleared to “0” (interrupt
disable state). In order to enable the interrupt at the same time when system returns from the
interrupt, write EI and RTI instructions continuously.
(5) P3 0 /INT0 pin
The P3 0 /INT0 pin need not be selected the external interrupt input INT function or the normal output
port P3 0 function. However, the EXF0 flag is set to “1” when a valid waveform is input to INT0 pin
even if it is used as an I/O port P3 0 .
(6) P3 1 /INT1 pin
The P3 1 /INT1 pin need not be selected the external interrupt input INT function or the normal output
port P3 1 function. However, the EXF1 flag is set to “1” when a valid waveform is input to INT1 pin
even if it is used as an I/O port P3 1 .
(7) EPOF instruction
Be sure to disable interrupts by executing the DI instruction before executing the EPOF instruction.