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5 setup for i/o ports, 6 providing of watchdog timer function by software, Appendix – Renesas 4514 User Manual

Page 195

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APPENDIX

3.4 Notes on noise

4513/4514 Group User’s Manual

Fig. 3.4.9 Wiring to a signal line where potential

levels change frequently

(3)

Oscillator protection using V

SS

pattern

As for a two-sided printed circuit board, print
a V

SS

pattern on the underside (soldering side)

of the position (on the component side) where
an oscillator is mounted.
Connect the V

SS

pattern to the microcomputer

V

SS

pin with the shortest possible wiring.

Besides, separate this V

SS

pattern from other

V

SS

patterns.

Fig. 3.4.10 V

SS

pattern on the underside of an

oscillator

X

IN

X

OUT

V

SS

CNTR

Do not cross

N.G.

X

IN

X

OUT

V

SS

An example of V

SS

patterns on the

underside of a printed circuit board

Oscillator wiring
pattern example

Separate the V

SS

line for oscillation from other V

SS

lines

3.4.5 Setup for I/O ports
Setup I/O ports using hardware and software as
follows:

• Connect a resistor of 100

or more to an I/O port

in series.


• As for an input port, read data several times by

a program for checking whether input levels are
equal or not.

• As for an output port or an I/O port, since the

output data may reverse because of noise, rewrite
data to its output latch at fixed periods.

• Rewrite data to pull-up control registers at fixed

periods.

3.4.6 Providing of watchdog timer function by

software

If a microcomputer runs away because of noise or
others, it can be detected by a software watchdog
timer and the microcomputer can be reset to normal
operation. This is equal to or more effective than
program runaway detection by a hardware watchdog
timer. The following shows an example of a watchdog
timer provided by software.
In the following example, to reset a microcomputer
to normal operation, the main routine detects errors
of the interrupt processing routine and the interrupt
processing routine detects errors of the main routine.
This example assumes that interrupt processing is
repeated multiple times in a single main routine
processing.

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