Scc lto error, Lan parity error, Lan offboard error – Motorola MVME1X7P User Manual
Page 87: Scc lto error -61 lan parity error -61, Lan offboard error -61, 1scc lto error lan parity error lan offboard error
Error Conditions
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SCC LTO Error
LAN Parity Error
LAN Offboard Error
Description:
Local Bus Time-out occurred while the SCC was Local
Bus master.
MPU Notification:
SCC Transmit Interrupt or SCC Receive Interrupt
Status:
SCC Transmit Interrupt Status register
SCC Transmit Current Buffer Address register
SCC Receive Interrupt Status register High
SCC Receive Current Buffer Address register PCCchip2
SCC Error Status register ($FFF4201C)
Comments:
SCC Transmit and Receive interrupt enables are controlled
in the SCC and in the PCCchip2.
Description:
Parity error while the LANCE was reading DRAM
MPU Notification:
PCCchip2 Interrupt (LAN ERROR IRQ)
Status:
PCCchip2 LAN Error Status register ($FFF42028)
Comments:
The LANCE has no ability to respond to TEA so the error
interrupt and status are provided in the PCCchip2. Control
for the interrupt is in the PCCchip2 LAN Error Interrupt
Control register ($FFF4202B).
Description:
Error encountered while the LANCE was attempting to go
to the VMEbus.
MPU Notification:
PCCchip2 Interrupt (LAN ERROR IRQ)
Status:
PCCchip2 LAN Error Status register ($FFF42028)
Comments:
The LANCE has no ability to respond to TEA so the error
interrupt and status are provided in the PCCchip2. Control
for the interrupt is in the PCCchip2 LAN Error Interrupt
Control register ($FFF4202B).