Motorola MVME1X7P User Manual
Page 309

IN-7
I
N
D
E
X
local bus interrupter registers
I/O Control register 1
I/O Control register 2
I/O Control register 3
Interrupt Level register 4 (bits 0-7)
Miscellaneous Control register
Status register (bits 16-23)
Status register (bits 24-31)
Vector Base register
local bus master
VMEbus and
local bus slave (VMEbus master) registers
Address Translation Address Register 4
Address Translation Select Register 4
Attribute Register 1
Attribute Register 2
Attribute Register 3
Attribute Register 4
Ending Address Register 1
Ending Address Register 2
Ending Address Register 3
Ending Address Register 4
local bus slave, composition of
local bus timer
local control and status segisters (LCSRs),
VMEbus
local I/O devices memory map
local reset, VMEbus
local SCSI ID
local-bus-to-VMEbus
Enable Control register
I/O Control register
interface
map decoders, programming
requester
requester register, programming
location monitor
interrupters, VMEbus
status register (VMEchip2 ASIC)
location monitors LM0-LM3 (VMEchip2
ASIC)
M
M48T58 BBRAM, TOD Clock memory map
manual strobe control
map decoders
GCSR
SDRAM
VMEbus interface
VMEchip2 ASIC
master interrupt enable (MIEN) bit
,
master interrupt enable (PCCchip2 ASIC)
MC68040
bus master support for 82596C
MPU
MC68060
MPU
MC680x0
indivisible RMW memory accesses
MCECC chip Memory Controller ASIC
MCECC internal register memory map
MCECC sector
arbitration process
BCLK Frequency register
Chip Prescaler counter
Data Control register
Defaults register 1