Motorola MVME1X7P - Manual (Page 36)

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Programming Issues
1
Figure 1-3. MVME177 Flash and EPROM Memory Mapping Schemes
SRAM
The MVME167P and MVME177P single-board computers include
128KB of 32-bit wide 100ns static RAM (SRAM) that supports 8-, 16-,
and 32-bit wide accesses. The SRAM allows the debugger to operate and
limited diagnostics to execute without using the on-board SDRAM or
mezzanines. The SRAM is under the control of the VMEchip2 ASIC, and
the access time is programmable. Refer to
Chapter 2, VMEchip2 for more
detail.
The MVME177P provides for SRAM battery backup. The battery backup
function is supplied by a Dallas DS1210S nonvolatile controller chip and
Panasonic 2032 (or equivalent) battery.
FFBFFFFF
FF800000
MAP 1
MAP 2
(as shipped)
MAP 3
FLASH
MEMORY
4MB
FLASH
BOTTOM
2MB
FFBFFFFF
FLASH
TOP 2MB
1MB EPROM
DUPLICATED:
READABLE
NOT WRITABLE
1MB EPROM
DUPLICATED:
READABLE
NOT WRITABLE
1MB EPROM
(BUG)
1MB EPROM
FF800000
FFA00000
FF900000
1534 9408
NO EPROM
IN MAP