Motorola MVME1X7P - Manual (Page 108)

2-18 Computer Group Literature Center Web Site
VMEchip2
2
In addition to the VMEbus timer, the chip contains a local bus timer. This
timer asserts the local TEA when the local bus cycle maintained in its
asserted state for longer that the programmed time-out period. This timer
can be enabled or disabled under software control. The time-out period can
be programmed for 8, 64, or 256 seconds.
Reset Driver
The chip includes both a global and a local reset driver. When the chip
operates as the VMEbus system controller, the reset driver provides a
global system reset by asserting the VMEbus signal SYSRESET
∗
. A
SYSRESET
∗
may be generated by the RESET switch, a power-up reset, a
watch dog timeout, or by a control bit in the LCSR. SYSRESET
∗
remains
asserted for at least 200 msec, as required by the VMEbus specification.
Similarly, the chip provides an input signal and a control bit to initiate a
local reset operation.
The local reset driver is enabled even when the chip is not the system
controller. A local reset may be generated by the
RESET switch, a power
up reset, a watch dog time-out, a VMEbus SYSRESET
∗
signal, or a
control bit in the GCSR.
Local Bus Interrupter and Interrupt Handler
There are 31 interrupt sources in the VMEchip2 ASIC:
VMEbus ACFAIL interrupter Tick timer 2-1
ABORT switch DMAC done
VMEbus SYSFAIL interrupter GCSR SIG3-0
Write post bus error GCSR location monitor 1-0
External input Software interrupts 7-0
VMEbus IRQ1 edge-sensitive interrupter VMEbus IRQ7-1 interrupts
VMEchip2 VMEbus interrupter acknowledge