FUJITSU CAN-Motor Board MB91F267N - Manual (Page 70)

AN07-00180-3E
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Table 4-3 Description of the timer control registers and setting values
Register name Setting value [function] Description
TCCSH0_ECKE 0 [internal clock] Clock select bit
TCCSH0_IRQZF 0 [bit clear] 0 detection interrupt flag bit
TCCSH0_IRQZE 0 [interrupt request disable] 0 detection interrupt request enable bit
TCCSH0_MSI2 - Interrupt mask select bits
Not used TCCSH0_MSI1 -
TCCSH0_MSI0 -
TCCSH0_ICLR 0 [bit clear] Compare clear interrupt flag bit
TCCSH0_ICRE 1 [interrupt request enable] Compare clear interrupt request enable
bit
TCCSL0_BFE 1 [compare clear buffer enable] Compare clear buffer enable bit
TCCSL0_STOP 1 [counter stop] Timer enable bit
TCCSL0_MODE 1 [up/down count mode] Timer counter mode bit
TCCSL0_SCLR 1 [counter initialization to 0000] Timer clear bit
TCCSL0_CLK3 0 [62.5 ns] Clock frequency select bits
TCCSL0_CLK2 0 [↑]
TCCSL0_CLK1 0 [↑]
TCCSL0_CLK0 0 [↑]