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Motorola DSP96002 User Manual

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D-10

DSP96002 USER’S MANUAL

MOTOROLA

4.

Round to minus infinity: results are always rounded in the direction of minus infinity, or "down".

D.1.5.1

Register file and automatic format conversion unit

The general-purpose register file consists of ten 96-bit registers named d0..d9, as shown in Figure D-9.

Each 96-bit register accommodates the DP internal floating point storage format. Each 96-bit register is ob-

tained by the concatenation of three 32-bit registers dn.h:dn.m:dn.l. The registers dn.h, dn.m, and dn.l can

be accessed as individual registers by MOVE operations and integer and logic instructions, as is further de-

scribed in Appendix D.2.

The registers d0..d7 are general-purpose registers in the sense that MOVE instructions and data ALU op-

erations do not differentiate between them. They are used for data ALU source and destination operands

for most of the data ALU instructions. They can be used as operands for MOVE operations as well as for

data ALU operations in the same instruction cycle: dual source operands are allowed. They can not be used

as dual destinations in the same instruction cycle.

The registers d8 and d9 are auxiliary registers which can be used for temporary data storage. Their main

purpose is to allow a fast, four-cycle radix-2, decimation in time FFT butterfly kernel, though their use is cer-

tainly not limited to this application. d8 and d9 can only be used as source operands in multiply operations

and MOVE instructions, and can only be written as destinations of MOVE instructions.

The format conversion unit provides automatic format conversion from/to the SP and DP memory storage

Infinite-precision

Rounded result (to

result

p=4 bits for example)

1.000 11100000....

1.001 (round up)

1.000 01100000....

1.000 (round down)

1.000 10000000....(absolute tie)

1.000 (round down)

1.001 10000000....

1.010 (round up)

Table D-2. Example of the Round to Nearest Mode.

Figure D-9. The Data ALU’s Register File

d0.h

d0.m

d0.l

d0

d1

d2

d3

d4

d5

d6

d7

d8

d9

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0