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Faddsub.s add and subtract faddsub.s – Motorola DSP96002 User Manual

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DSP96002 USER’S MANUAL

MOTOROLA

FADDSUB.S

Add and Subtract

FADDSUB.S

Description:

Add and subtract the two specified operands and round to single precision. Store the rounded result of

the addition in D2 and of the subtraction in D1.

Input Operand(s) Precision: SEP Floating-Point.

Output Operand(s) Precision: SP Floating-Point.

CCR Condition Codes:

C

- Not affected.

V

- Not affected.

Z

- Set if result of the addition is zero. Cleared otherwise.

N

- Set if result of the addition is negative. Cleared otherwise.

I

- Set if result of the addition is infinity. Cleared otherwise.

LR

- Not affected.

R

- Not affected.

A

- Not affected.

ER Status Bits:

INX

-Set if the addition or subtraction result is inexact. Cleared otherwise.

DZ

-Always cleared.

UNF

-Set if the addition or subtraction result underflows. Cleared otherwise.

OVF

-Set if the addition or subtraction result overflows. Cleared otherwise.

OPERR -Set if operands of the addition are opposite-signed infinities or if the operands of

the subtraction are like-signed infinities. Cleared otherwise.

SNAN -Set if any operand is a signaling NaN. Cleared otherwise.

NAN

-Set if result of the addition is a NaN. Cleared otherwise.

UNCC -Always cleared.

IER Flags: Flags changed according to standard definition.

Assembler Syntax:

FADDSUB.S D1,D2

(move syntax - see the MOVE instruc-

tion description.)

Operation:

D1 + D2

ROUND(SP)

D2 (parallel data bus move)

D1 - D2

ROUND(SP)

D1