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Motorola DSP96002 User Manual

Page 197

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MOTOROLA

DSP96002 USER’S MANUAL

A - 9

Note 28

All ? bits - If SR is specified as a destination operand, set according to the corresponding bit of
the source operand. Not affected otherwise.

Note 29

All ? bits - If SR is specified as destination operand, and A,

R, LR, I, N, Z, V or C is selected,

then the selected bit will be changed. If SR is not specified, then C will be set if bit #n of the
source operand is set and cleared if bit #n of the source operand is set. Not affected otherwise.

Note 30

All ? bits - If SR is specified as destination operand, and A,

R, LR, I, N, Z, V or C is selected,

then the selected bit will be cleared. If SR is not specified, then C will be set if bit #n of the
source operand is set set and cleared if bit #n of the source operand is set. Not affected oth-
erwise.

Note 31

All ? bits - If SR is specified as destination operand, and A,

R, LR, I, N, Z, V or C is selected,

then the selected bit will be set. If SR is not specified, then C will be set if bit #n of the source
operand is set set and cleared if bit #n of the source operand is set. Not affected otherwise.

Note 32

A - Cleared if result is negative without overflow. Cleared if result is positive with overflow. Not
affected otherwise.

Note 33

LR - Cleared if result is positive without overflow. Cleared if result is negative with overflow. Not
affected otherwise.

Note 34

R - Cleared if LR was set and result is negative without overflow. Cleared if LR was set and
result is positive with overflow. Not affected otherwise.

Note 35

A - Cleared if result is a NaN. Cleared if result is negative and not zero. Not affected otherwise.

Note 36

LR - Cleared if result is positive, zero or NaN. Not affected otherwise.

Note 37

R - Cleared if result is a NaN. Not affected otherwise.

Note 38

R - Cleared if result is a NaN. Cleared if result is negative and not zero and LR was set. Not
affected otherwise.

Note 39

C - Set if result is a NaN. Set if result is negative and not zero. Cleared otherwise.

Note 40

Z - Set if source operands are equal. Cleared otherwise.

Note 41

V - Set if source operand is a NaN, infinity or negative non-zero. Set if positive source operand
is too big to be representable in the integer number range. Cleared otherwise.

A.4

EXCEPTION STATUS BITS COMPUTATION

Floating-point operations affect the seven status bits located in the IER register. The

standard definitions

of the ER bits is given below. These definitions are based on the ANSI/IEEE Standard 754-1985 which can

be ordered from:

IEEE

345 East 47th Street

New York, N.Y. 10017

Additional information (particularly relating to test cases ) can be found in J. T. Coonen,

An Implementation

Guide to a Proposed Standard for Floating-Point Arithmetic

, Computer, 1980, pages 68-79. Examples of

the use of these bits are given in

Section 4.6

.

INX

(Inexact) - Set if a floating-point mantissa, considered as having infinite precision, has too many
significant bits to be represented exactly in the current rounding precision. That is, a result is
inexact if there was a loss of accuracy due to rounding. Cleared otherwise. The INX bit is not
affected by fixed point operations. The INX bit is cleared during processor reset.