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Not logical complement not – Motorola DSP96002 User Manual

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DSP96002 USER’S MANUAL

MOTOROLA

NOT

Logical Complement

NOT

Instruction Fields:

(u u)

D

d d d

Dn.L

n n n

where nnn = 0-7

Timing: 2 + mv oscillator clock cycles

Memory: 1 + mv program words

10

0010

uu01

1ddd

31

14 13

0

OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA

DATA BUS MOVE FIELD

Operation:

~D{31:0}

D{31:0} (parallel data bus move)

Assembler Syntax:

NOT D
( See the MOVE instruction description.)

Description:

The one’s complement of the low portion of the destination operand is taken and the result is stored in D.

This instruction is a 32-bit operation and is performed on bits 0-31 of D. The remaining bits of D are not

affected.

Input Operand(s) Precision: 32-bit integer.

Output Operand Precision: 32-bit integer.

CCR Condition Codes:

C

- Not affected.

V

- Always cleared.

Z

- Set if result is zero. Cleared otherwise.

N

- Set if result is negative. Cleared otherwise.

I

- Not affected.

LR

- Not affected.

R

- Not affected.

A

- Not affected.

ER Status Bits: Not affected.

IER Flags: Not affected.

Instruction Format: NOT D ( See the MOVE instruction description.)