beautypg.com

Brclr branch if bit clear brclr – Motorola DSP96002 User Manual

Page 231

background image

MOTOROLA

DSP96002 USER’S MANUAL

A - 43

BRCLR

Branch if Bit Clear

BRCLR

Operation:

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

If S{n} = 0, then PC + xxxx

PC

else PC + 1

PC

Assembler Syntax:

BRCLR #bit,X: ea, label

BRCLR #bit,X: aa, label

BRCLR #bit,X: pp, label

BRCLR #bit,Y: ea, label

BRCLR #bit,Y: aa, label

BRCLR #bit,Y: pp, label

BRCLR #bit,S,label

Description:

The nth bit in the source operand is tested. If the tested bit is cleared, program execution continues at

location PC+displacement. The PC contains the address of the next instruction. If the tested bit is set,

the PC is incremented and program execution continues sequentially. However, the address register spec-

ified in the effective address field is always updated independently of the condition. The displacement is

a 2’s complement 32-bit integer that represents the relative distance from the current PC to the destination

PC. The 32-bit displacement is contained in the extension word of the instruction. All memory alterable

addressing modes may be used to reference the source operand. Absolute Short, I/O Short and Register

Direct addressing modes may also be used. Note that if the specified source operand S is the SSH, the

stack pointer register will be decremented by one. The bit to be tested is selected by an immediate bit

number 0-31. See Section A.10 for restrictions.

CCR Condition Codes: Not affected.

ER Status Bits: Not affected.

IER Flags: Not affected.