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Move – Motorola DSP96002 User Manual

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DSP96002 USER’S MANUAL

MOTOROLA

FFcc

Floating-Point iF

FFcc

Conditional Instruction

without CCR, ER, IER update

Operation:

If cc, then

Opcode Operation

S

D

Assembler Syntax:

Opcode-Operands

S,D FFcc

Opcode-Operands

FFcc

Description:

If the specified floating-point condition is true, transfer data from the specified source S to the specified

destination D. Also, store result(s) of the specified Data ALU operation. If the specified condition is false,

no destinations are altered. The CCR and ER registers are not updated with the condition codes gener-

ated by the Data ALU operation. The UNCC bit in the ER register and SIOP flag in the IER are set by the

FFcc instruction if the NAN bit in the ER register was set and the specified condition is one of the condi-

tions with a "Yes" entry in the "Set UNCC" column. If no register move is specified, this instruction is as-

sembled with a R0 to R0 move.

"cc" may specify the following conditions:

Non-aware

Mnemonic

Condition

Set UNCC*

EQ

- equal

Z = 1

No

ERR

- error

UNCC v SNAN v OPERR v No

OVF v UNF v DZ = 1

GE

- greater than or equal

NAN v (N & ~Z) = 0

Yes

GL

- greater or less than

NAN v Z = 0

Yes

GLE

- greater, less or equal

NAN = 0

Yes

GT

- greater than

NAN v Z v N = 0

Yes

INF

- infinity

I = 1

Yes

LE

- less than or equal

NAN v ~(N v Z) = 0

Yes

LT

- less than

NAN v Z v ~N = 0

Yes

MI

- minus

N = 1

No

NE(Q)

- not equal

Z = 0

No

NGE

- not(greater than or equal)

NAN v (N & ~Z) = 1

Yes

NGL

- not(greater or less than)

NAN v Z = 1

Yes

NGLE

- not(greater, less or equal)

NAN = 1

Yes

NGT

- not greater than

NAN v Z v N = 1

Yes

NINF

- not infinity

I = 0

Yes

NLE

- not(less than or equal)

NAN v ~(N v Z) = 1

Yes

NLT

- not less than

NAN v Z v ~N = 1

Yes

OR

- ordered

NAN = 0

No

PL

- plus

N = 0

No

UN

- unordered

NAN = 1

No

Note: The operands for the ERR condition are taken from the ER register.

* See description of UNcc bit in Section A.4.

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