4 data memory (ram), Toshiba, 083f – Toshiba TMP87CP24AF User Manual
Page 9: 00bf
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TOSHIBA
TMP87CM24A/P24A
1.4
Data Memory (RAM)
The
TMP87CM24A/P24A
have
a
2Kx
8-bit
(address
0040
h
to
083F
h
)
of
data
memory
(static
RAM).
Figure
1 -4 shows the data memory map.
Addresses
OOOO
h
to
OOFF
h
are
used
as
a
direct
addressing
area
to
enhance
instructions
which
utilize
this
addressing mode; therefore, addresses 0040
h
to OOFF
h
in the data memory can also be used for user flags
or user counters.
Example 1 :
If bit 2 at data memory address OOCO
h
is "1", OO
h
is written to data memory at
address
00E3
h
;
otherwise,
FF
h
is written to the data memory at address
00E3
h
-
SZERO :
SNEXT:
TEST
(00C0H).2
; if (OOCO
h
)
2
= 0 then jump
JRS
T,SZERO
CLR
(00E3H)
; (00E3
h
)^00
h
JRS
T,SNEXT
LD
(00E3H),0FFH
; (00E3
h
)^FF
h
Example 2 :
Increments the contents of data memory at address
OOFS
h
,
and clears to
OO
h
when
IO
h
is exceeded.
INC
(OOFSH)
; (OOFS
h
) (OOFS
h
) +1
AND
(OOFSH), OFH
; (OOFS
h
) (OOFS
h
)
a
OF
h
General-purpose
register
banks
(8
registersx
16
banks)
are
also
assigned
to
the
128
bytes
of
addresses
0040
h
-00BF
h
.
Access
as
data
memory
is
still
possible
even
when
being
used
for
registers.
For
example,
when
the
contents
of
the
data
memory
at
address
0040
h
is
read
out,
the
contents
of
the
accumulator
in
the
bank
0
are
also
read
out.
The
stack
can
be
located
anywhere
within
the
data
memory
except
the
register bank area. The stack depth is limited only by the free data memory size. For more details on the
stack, see section "1.7 Stack and Stack Pointer".
With
the
TMP87CM24A/P24A,
programs
in
data
memory
cannot
be
executed.
If
the
program
counter
indicates
a
specific
data
memory
address
(addresses
0040
h
to
083F
h
),
an
address-trap-reset
is
generated
due to due to bus error. (Output from the RESET pin goes low.)
Example Clears RAM to "OO
h
" except the bank 0
SRAMCLR
Note: The data memory contents become unstable when the power supply is turned on; therefore, the
data
memory
should
be
initialized
by
an
initialization
routine.
Note
that
the
general-purpuse
registers are mapped in the RAM; therefore, do not clear RAM at the current bank addresses.
LD
HL, 0048H
; Sets start address to HL register pair
LD
A, H
; Sets initial data (OO
h
) to A register
LD
BC, 07F7H
; Sets number of byte to BC register pair
LD
(HL + ), A
DEC
BC
JRS
F, SRAMCLR
3
-
24-9
2002
-
10-03