Ib.^ il, Ib.^____ _______ il, Toshiba – Toshiba TMP87CP24AF User Manual
Page 87
Attention! The text in this document has been recognized automatically. To view the original document, you can use the "Original mode".

TOSHIBA
TMP87CM24A/P24A
When
an
external
clock
is
used,
the
data
must
be
written
to
the
data
buffer
register
before
shifting
next
data.
Thus,
the
transfer
speed
is
determined
by
the
maximum
delay
time
from
the
generation
of
the
interrupt
request
to
writing
of
the
data
to
the
data
buffer
register
by
the
interrupt
service
program.
When the transmit is started, after the SlOF goes "high" output from the SO pin holds final bit of the
last data until falling edge of the SCK.
If it is necessary to change the number of words, SIOS should be cleared to "0", then BUF must be
rewritten
after
confirming
that
SlOF
has
been
cleared
to
"0".
That
the
transmission
has
ended
can
be determined from the status of SlOF (bit 7 in SI01SR/SI02SR) because SlOF is cleared to "0" when a
transfer
is
completed.
When
SIOINH
is
set,
the
transmission
is
immediately
ended
and
SlOF
is
cleared
to "
0
".
The
transmission
is
ended
by
clearing
SIOS
to
"0"
or
setting
SIOINH
to
"1"
in
buffer
empty
interrupt
service program.
When an external clock is used, it is also necessary to clear SIOS to "0" before shifting the next data;
otherwise, dummy data will be transmitted and the operation will end.
SIOS
SlOF
SEF
SCK pin (output)
SO pin
INTSIO interrupt
DBR
SIOS
SlOF
SEF
SCK pin (output)
SO pin
INTSIO interrupt
DBR
■ Clear SIOS.
Ib.^____ _______ IL
1
________________________
TH
t
t
Write Write
(a)
(b)
(a) Internal Clock
■Clear SIOS
i_r
1
\ aoXai X a2A asXanX asX asX ayX boXbiXb2X bsXbnX bsXbsXby/
_______________________________n_____________________________________
]di
t
t
Write Write
(a)
(b)
(b) External Clock
Figure 2-38. Transfer Mode (Example:
8
-Bit, 1 Word Transfer)
3
-
24-87
2002
-
10-03