Toshiba TMP87CP24AF - Manual (Page 12)

TOSHIBA
TMP87CM24A/P24A
The TLCS-870 Series can transfer data directly memory to memory, and operate directly between
memory data and memory data. This facilitates the programming of block processing.
Example 2: Block transfer
LD B, m m = n - 1 (n : Number of bytes to transfer)
LD HL, DSTA Sets destination address to HL
LD DE, SRCA Sets source address to DE
SLOOP: LD (HL), (DE) HL<-DE
INC HL HL<-HL+ 1
INC DE DE<-DE + 1
DEC B B<-B- 1
JRS F, SLOOP if B S Othen loop
(3) B, C, BC
Registers B and C can be used as 8-bit buffers or counters, and the BC register pair can be used as a
16-bit buffer or counter. The C register functions as an offset register for register-offset index
addressing (refer to example 1 (3) above) and as a divisor register for the division instruction [DIV gg.
C].
Example 1 : Repeat processing
LD B, n Sets n as the number of repetitions to B
SREPEAT: I processing : (n + 1 times processing)
DEC B
JRS F, SREPEAT
Example 2 : Unsigned integer division (16-bit-r 8-bit)
DIV WA, C Divides the WA contents by the C contents, places the
quotient in A and the remainder in W.
The general-purpose register banks are selected by the 4-bit register bank selector (RBS). During reset,
the RBS is initialized to "0". The bank selected by the RBS is called the current bank.
Together with the flag, the RBS is assigned to address OOBF h in the SFR as the program status word (PSW).
There are 3 instructions [LD RBS, n], [PUSH PSW], [POP PSW] to access the PSW. The PSW can be also
operated by the memory access instruction.
Example 1 : Incrementing the RBS
INC (OOBFH)
Example 2 : Reading the RBS
LD A, (OOBFH)
; RBS RBS + 1
; A <—RBS (AstoO ^ RBS, AytoA^FIags)
Highly efficient programming and high-speed task switching are possible by using bank changeover to
save registers during interrupt and to transfer parameters during subroutine processing.
During interrupt, the PSW is automatically saved onto the stack. The bank used before the interrupt was
accepted is restored automatically by executing an interrupt return instruction [RETI]/[RETN] ; therefore,
there is no need for the RBS save/restore software processing.
The TLCS-870 Series supports a maximum of 15 interrupt sources. One bank is assigned to the main
program, and one bank can be assigned to each source. Also, to increase the efficiency of data memory
usage, assign the same bank to interrupt sources which are not nested.
Example: Saving/restoring registers during interrupt task using bank changeover.
PINT1 : LD RBS, n ; RBS n (Bank changeover)
Interrupt processing
RETI ; Maskable interrupt return (Bank restoring)
3
-
24-12 2002
-
10-03