Toshiba – Toshiba TMP87CP24AF User Manual
Page 88
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TOSHIBA
TMP87CM24A/P24A
SCK pin
SlOF
SO pin Bite
X
Bit?
tsoDH =min 3.5/fc [s] (In the NORMAL1/2, IDLE1/2 modes)
= min 3.5/fs [s] (In the SLOW, SLEEP modes)
Figure 2-39. Transmitted Data Hold Time at End of Transmit
(2) 4-Bit and 8-Bit Receive
Modes
After
setting
the
control
registers
to
the
receive
mode,
set
SIOS
to
"1"
to
enable
receiving.
The
data
are then transferred to the shift register via the SI pin in synchronous with the serial clock. When one
word
of
data
has
been
received,
it
is
transferred
from
the
shift
register
to
the
data
buffer
register
(DBR).
When
the
number
of
words
specified
with
the
BUF
has
been
received,
an
INTSIO
(buffer
full)
interrupt
is
generated
to
request
that
these
data
be
read
out.
The
data
are
then
read
from
the
data
buffer registers by the interrupt service program.
When
the
internal
clock
is
used,
and
the
previous
data
are
not
read
from
the
data
buffer
register
before
the
next
data
are
received,
the
serial
clock
will
stop
and
an
automatic-wait
will
be
initiated
until the data are read. A wait will not be initiated if even one data word has been read.
Note:
Waits are also canceled by reading a DBR not being used as a received data buffer register
is read; therefore, during SIO do not use such DBR for other applications.
When
an
external
clock
is
used,
the
shift
operation
is
synchronized
with
the
external
clock;
therefore,
the
previous
data
are
read
before
the
next
data
are
transferred
to
the
data
buffer
register.
If
the
previous
data
have
not
been
read,
the
next
data
will
not
be
transferred
to
the
data
buffer
register
and
the
receiving
of
any
more
data
will
be
canceled.
When
an
external
clock
is
used,
the
maximum
transfer
speed
is
determined
by
the
delay
between
the
time
when
the
interrupt
request is generated and when the data received have been read.
The
receiving
is
ended
by
clearing
SIOS
to
"0"
or
setting
SIOINH
to
"1"
in
buffer
full
interrupt service
program. When SIOINH is set, the receiving is immediately ended and SlOF is cleared to "0".
When
SIOS
is
cleared,
the
current
data
are
transferred
to
the
buffer
in
4-bit
or
8
-bit
blocks.
The
receiving
mode
ends
when
the
transfer
is
completed.
SlOF
is
cleared
to
"0"
when
receiving
is
ended
and thus can be sensed by program to confirm that receiving has ended.
If
it
is
necessary
to
change
the
number
of
words
in
external
clock
operation,
SIOS
should
be
cleared
to "0" then BUF must be rewritten after confirming that SlOF has been cleared to "0".
If
it
is
necessary
to
change
the
number
of
words
in
internal
clock,
during
automatic-wait
operation
which
occurs
after
completion
of
data
receive,
BUF
must
be
rewritten
before
the
received
data
is
read out.
Note:
The buffer contents are lost when the transfer mode is switched. If it should become
necessary to switch the transfer mode, end receiving by clearing SIOS to "0", read the last
data and then switch the transfer mode.
3
-
24-88
2002
-
10-03