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AMD Geode SC2200 User Manual

Page 189

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AMD Geode™ SC2200 Processor Data Book

197

Core Logic Module - Register Summary

32580B

487h

R/W

DMA Channel 0 High Page Register

Page 310

489h

R/W

DMA Channel 6 High Page Register

Page 310

48Ah

R/W

DMA Channel 7 High Page Register

Page 310

48Bh

R/W

DMA Channel 5 High Page Register

Page 310

Programmable Interval Timer Registers (Table 6-45)

040h

W

PIT Timer 0 Counter

Page 311

R

PIT Timer 0 Status

Page 311

041h

W

PIT Timer 1 Counter (Refresh)

Page 311

R

PIT Timer 1 Status (Refresh)

Page 311

042h

W

PIT Timer 2 Counter (Speaker)

Page 312

R

PIT Timer 2 Status (Speaker)

Page 312

043h

R/W

PIT Mode Control Word Register

Page 312

Read Status Command

Counter Latch Command

Programmable Interrupt Controller Registers (Table 6-46)

020h / 0A0h

WO

Master / Slave PCI ICW1

Page 313

021h / 0A1h

WO

Master / Slave PIC ICW2

Page 313

021h / 0A1h

WO

Master / Slave PIC ICW3

Page 313

021h / 0A1h

WO

Master / Slave PIC ICW4

Page 313

021h / 0A1h

R/W

Master / Slave PIC OCW1

Page 313

020h / 0A0h

WO

Master / Slave PIC OCW2

Page 314

020h / 0A0h

WO

Master / Slave PIC OCW3

Page 314

020h / 0A0h

RO

Master / Slave PIC Interrupt Request and Service Registers for OCW3 Commands

Page 314

Keyboard Controller Registers (Table 6-47)

060h

R/W

External Keyboard Controller Data Register

Page 316

061h

R/W

Port B Control Register

Page 316

062h

R/W

External Keyboard Controller Mailbox Register

Page 316

064h

R/W

External Keyboard Controller Command Register

Page 316

066h

R/W

External Keyboard Controller Mailbox Register

Page 316

092h

R/W

Port A Control Register

Page 316

Real-Time Clock Registers (Table 6-48)

070h

WO

RTC Address Register

Page 317

071h

R/W

RTC Data Register

Page 317

072h

WO

RTC Extended Address Register

Page 317

073h

R/W

RTC Extended Data Register

Page 317

Miscellaneous Registers (Table 6-49)

0F0h, 0F1h

WO

Coprocessor Error Register

Page 317

170h-177h/
376h-377h

R/W

Secondary IDE Registers

Page 317

1F0-1F7h/
3F6h-3F7h

R/W

Primary IDE Registers

Page 317

4D0h

R/W

Interrupt Edge/Level Select Register 1

Page 317

4D1h

R/W

Interrupt Edge/Level Select Register 2

Page 318

Table 6-28. ISA Legacy I/O Register Summary (Continued)

I/O Port

Type

Name

Reference