Intel PXA255 - Manual (Page 99)

Intel® PXA255 Processor Developer’s Manual 3-37
Clocks and Power Manager
8 CKEN8
I2S Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
7 CKEN7
BTUART Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
These bits are set by hardware reset or watchdog reset
6 CKEN6
FFUART Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
5 CKEN5
STUART Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
4 CKEN4
HWUART Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
3 CKEN3
SSP Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
2 CKEN2
AC97 Unit Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
1 CKEN1
PWM1 Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
0 CKEN0
PWM0 Clock Enable
0 – Clock to the unit is disabled
1 – Clock to the unit is enabled.
Set by hardware and watchdog resets
Table 3-21. CKEN Bit Definitions (Sheet 2 of 2)
0x4130_0004 CKEN Clocks Manager
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
reserved
CK
E
N
1
6
reser
v
ed
CK
E
N
1
4
CK
E
N
1
3
CK
E
N
1
2
CK
E
N
11
reser
v
ed
reser
v
ed
CK
EN
8
CK
EN
7
CK
EN
6
CK
EN
5
reser
v
ed
CK
EN
3
CK
EN
2
CK
EN
1
CK
EN
0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1 1
Bits Name Description