Intel PXA255 - Manual (Page 508)

15-4 Intel® PXA255 Processor Developer’s Manual
MultiMediaCard Controller
Note: One- and three-byte data transfers are not supported with this controller. Data transfers of 10 or
more bytes are supported for stream writes only.
Refer to The MultiMediaCard System Specification for detailed information on MMC and SPI
modes of operation.
15.2 MMC Controller Functional Description
The software must read and write the MMC controller registers and FIFOs to initiate
communication to a card.
Figure 15-4. SPI Mode Operation Without Data Token
Figure 15-5. SPI Mode Read Operation
Figure 15-6. SPI Mode Write Operation
Command MMCMD
MMDAT
Command
Response
from host to
card
from card to
host
from host to
card
Response Busy
from card to
host
Command MMCMD
MMDAT
Command
Response
from host to
data from card to
Next
Data Block CRC
from card to
Command MMCMD
MMDAT
Command
Response
from host to
data from host to new
Data Response Busy
from card to
Data Block
Data response