Intel PXA255 - Manual (Page 348)

9-18 Intel® PXA255 Processor Developer’s Manual
I
2
C Bus Interface Unit
9.5 Slave Mode Programming Examples
9.5.1 Initialize Unit
1. Set the slave address in the ISAR.
2. Enable desired interrupts in the ICR.
3. Set the ICR[IUE] bit to enable the I 2 C unit.
9.5.2 Write n Bytes as a Slave
1. When a Slave Address Detected interrupt occurs.
Read ISR: Slave Address Detected (1), Unit Busy (1), R/nW bit (1), ACK/NAK (0)
2. Write a 1 to the ISR[SAD] bit to clear the interrupt.
3. Return from interrupt.
4. Load data byte to transfer in the IDBR.
5. Set ICR[TB] bit.
6. When a IDBR Transmit Empty interrupt occurs.
Read ISR: IDBR Transmit Empty (1), ACK/NAK (0), R/nW bit (0)
7. Load data byte to transfer in the IDBR.
8. Set the ICR[TB] bit.
9. Write a 1 to the ISR[ITE] bit to clear interrupt.
10. Return from interrupt.
11. Repeat steps 6 to 10 for n-1 times. If, at any time, the slave does not have data, the I 2 C unit
keeps SCL low until data is available.
12. When a IDBR Transmit Empty interrupt occurs.
Read ISR: IDBR Transmit Empty (1), ACK/NAK (1), R/nW bit (0)
13. Write a 1 to the ISR[ITE] bit to clear interrupt.
14. Return from interrupt
15. When Slave Stop Detected interrupt occurs.
Read ISR: Unit Busy (0), Slave STOP Detected (1)
16. Write a 1 to the ISR[SSD] bit to clear interrupt.
9.5.3 Read n Bytes as a Slave
1. When a Slave Address Detected interrupt occurs.
Read ISR: Slave Address Detected (1), Unit busy (1), R/nW bit (0)
2. Write a 1 to the ISR[SAD] bit to clear the interrupt.
3. Return from interrupt.
4. Set ICR[TB] bit to initiate the transfer.