Intel PXA255 - Manual (Page 177)

Intel® PXA255 Processor Developer’s Manual 5-27
DMA Controller
3. In memory, create the descriptor to be added and set its stop bit to a 1.
4. In the memory, manipulate the DDADR of the current chain’s last descriptor such that its
DDADR points to the descriptor created in Step 3.
5. In the memory, create a new descriptor that has the same DDADR, DSADR, DTADR, and
CMD as those of the stopped DMA channel. The new descriptor is the next descriptor for the
list.
6. Examine the DMA channel registers and determine if the channel stopped in the chain’s last
descriptor of the chain. If it did, manipulate the DDADR of the last descriptor in the memory
so that its DDADR points to the descriptor created in Step
3. Otherwise, continue to Step 7.
7. Program the channel’s DDADR with the descriptor created in Step 5.
8. Set the DCSR[RUN] to a 1.
Example 4. How to initialize a channel that is going to be used by a direct DMA master:
The most efficient way to move data between an I/O device and main memory is the processor’s
descriptor-based DMA system. Each application has different requirements, so a descriptor-based
DMA may be best for some applications while a non-descriptor-based DMA is best for others. For
applications that can not tolerate the time needed to fetch a descriptor before each DMA transfer,
choose the non descriptor-based DMA method. For applications that can tolerate it, a descriptor-
based DMA method can reduce the amount of core intervention.
Self–Modifying Descriptors: The descriptor-based DMA system can be used to provide true direct
memory access to devices that require it.
In this example, a companion chip has these requirements:
1. When the companion chip asserts DREQ from 0 to 1, the DMA must fetch four words of the
descriptor from one of the chip’s ports.
2. Based on the information contained in the four descriptor words, the DMA must transfer data
from the source address to the destination address without waiting for another request from the
companion chip.
3. After it transfers the number of bytes in DCMD:LENGTH, the DMA returns to Step 1.
An external device with these requirements can use a constant descriptor in memory.
struct {longddadr;
longdsadr;
longdtadr;
shortlength;
shortdcmd;
} desc[2];
desc[0].ddadr = &desc[1]
desc[0].dsadr = I_ADR + I_DESC_OFFS
desc[0].dtadr = &desc[1].dsadr
desc[0].length = 8;
desc[0].dcmd = CMD_IncTrgAdr | CMD_FlowThru;
desc[1].ddadr = &desc[0]
desc[1].dtadr = I_ADR + I_DATA_OFFS
desc[1].dsadr = 0
desc[1].length = 0
desc[1].dcmd = 0