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4 transmit underrun (tur), 5 sent stall (sst), 6 force stall (fst) – Intel PXA255 User Manual

Page 438: 7 bit 6 reserved, 8 transmit short packet (tsp), 9 udc interrupt control register 0 (uicr0), 9 udc interrupt control register 0 (uicr0) -36

4 transmit underrun (tur), 5 sent stall (sst), 6 force stall (fst) | 7 bit 6 reserved, 8 transmit short packet (tsp), 9 udc interrupt control register 0 (uicr0), 9 udc interrupt control register 0 (uicr0) -36 | Intel PXA255 User Manual | Page 438 / 600 4 transmit underrun (tur), 5 sent stall (sst), 6 force stall (fst) | 7 bit 6 reserved, 8 transmit short packet (tsp), 9 udc interrupt control register 0 (uicr0), 9 udc interrupt control register 0 (uicr0) -36 | Intel PXA255 User Manual | Page 438 / 600
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