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2 transmit holding register (thr), 3 divisor latch registers (dll and dlh), Thr bit definitions -7 – Intel PXA255 User Manual
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2 transmit holding register (thr), 3 divisor latch registers (dll and dlh), Thr bit definitions -7 | Intel PXA255 User Manual | Page 365 / 600
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PXA255
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(95 pages)