Yaskawa MP900 Series Ladder Programming Manual - Manual (Page 226)

5.8 DDC Instructions
5.8.6 PID Control (PID)
5-157
Instructions
5
( 2 ) Format
∗ C and # registers cannot be used.
[ a ] Parameter Table Configuration for PID Instruction with Integers
∗ The relay input and output bits are assigned as given below. (Close = Bit change to 1 (ON), Open = Bit change to 0
(OFF))
First address of
parameter table
Output value
Input value
Icon:
Key entry: PID
Parameter Name
Applicable Data Types
B W L F A Index Constant
Input value (In) × { × { × { {
First address of
parameter table (Prm)
× × × × { * { {
Output value (Out) × { * × { * × { ×
Address
Data
Type
Symbol Name Specification I/O
0 W RLY Relay I/O Relay inputs and relay outputs * IN/OUT
1 W Kp P gain
Gain for the P compensation
(A gain of 1 is equivalent to 100.)
IN
2 W Ki I gain
Gain for the input to the integration circuit
(A gain of 1 is equivalent to 100.)
IN
3 W Kd D gain
Gain for the input to the differential circuit
(A gain of 1 is equivalent to 100.)
IN
4 W Ti Integral time Integral time (ms) IN
5 W Td1
Differential time for
divergence
Differential time used when the input diverges (ms) IN
6 W Td2
Differential time for
convergence
Differential time used when the input converges (ms) IN
7 W IUL
Upper integration
limit
Upper limit for the I compensation IN
8 W ILL
Lower integration
limit
Lower limit for the I compensation IN
9 W UL PID upper limit Upper limit for the P + I compensation IN
10 W LL PID lower limit Lower limit for the P + I compensation IN
11 W DB PID output dead zone Dead zone width for the P + I compensation IN
12 W Y PID output PI compensation output (output to Out) OUT
13 W Yi I compensation I compensation storage OUT
14 W IREM I remainder I remainder storage OUT
15 W X Input value storage Storage of current input value OUT
Bit Symbol Name Specification I/O
0 IRST Reset integration bit This input is closed to reset the integration operation. IN
1 to 7 – (Reserved.) Spare input relays IN
8 to F – (Reserved.) Spare output relays OUT