Zilog Z80380 - Manual (Page 82)

5-48
Z380 ™
U SER ' S M ANUAL
DC-8297-03
Z ILOG
DJNZ
DECREMENT AND JUMP IF NON-ZERO
DJNZ dst dst = RA
Operation: B
←
B-1
If (B <> 0) then begin
dst
←
SIGN EXTEND dst
if (XM) then begin
PC(31-0)
←
PC(31-0) + dst(31-0)
end
else begin
PC(15-0)
←
PC(15-0) + dst(15-0)
end
end
The B register is decremented by one. If the result is non-zero, then the destination address
is calculated and then loaded into the Program Counter (PC). Control then passes to the
instruction whose address is pointed to by the PC. When the B register reaches zero, control
falls through to the instruction following DJNZ. This instruction provides a simple method of
loop control.
The destination address is calculated using Relative addressing. The displacement in the
instruction is added to the PC; the PC value used is the address of the instruction following
the DJNZ instruction.
These instructions employ either an 8-bit, 16-bit, or 24-bit signed, two’s complement
displacement from the PC to permit jumps within a range of -126 to +129 bytes, -32,765 to
+32,770 bytes, or -8,388,604 to +8,388,611 bytes from the location of this instruction.
Flags: S: Unaffected
Z: Unaffected
H: Unaffected
V: Unaffected
N: Unaffected
C: Unaffected
Addressing Execute
Mode Syntax Instruction Format Time Note
RA: DJNZ addr 00010000 —disp— note X
DJNZ addr 11011101 00010000 -d(low)- -d(high) note X
DJNZ addr 11111101 00010000 -d(low)- -d(mid)- -d(high) note X
Note: 3 if branch not taken, 4 if branch taken