Zilog Z80380 - Manual (Page 154)

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Z380 ™
U SER ' S M ANUAL
DC-8297-03
Z ILOG
OTIRW
OUTPUT, INCREMENT AND REPEAT (WORD)
OTIRW
Operation: repeat until (BC=0) begin
BC(15-0)
←
BC(15-0) – 1
(DE)
←
(HL)
HL
←
HL + 2
end
This instruction is used for block output of strings of data. The string of output data is loaded
into the selected peripheral from memory at consecutive addresses, starting with the
location addressed by the HL register and increasing. During the I/O transaction the 32-bit
DE register is placed on the address bus.
First the BC register, used as a counter, is decremented by one. The word of data from the
memory location addressed by the HL register is loaded into the selected peripheral. The
HL register is then incremented by two, thus moving the pointer to the next source for the
output. If the result of decrementing the BC register is 0, the instruction is terminated,
otherwise the sequence is repeated. If the BC register contains 0 at the start of the execution
of this instruction, 65536 bytes are output.
This instruction can be interrupted after each execution of the basic operation. The Program
Counter value at the start of this instruction is saved before the interrupt request is accepted,
so that the instruction can be properly resumed.
Flags: S: Unaffected
Z: Set if the result of decrementing B is zero; cleared otherwise
H: Unaffected
V: Unaffected
N: Set
C: Unaffected
Addressing Execute
Mode Syntax Instruction Format Time Note
OTIRW 11101101 11110011 2+r+o