Zilog Z80380 - Manual (Page 57)

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Z380 ™
U SER ' S M ANUAL Z ILOG
DC-8297-03
ADD
ADD (BYTE)
ADD A,src src = R, RX, IM, IR, X
Operation: A
←
A + src
The source operand is added to the accumulator and the sum is stored in the accumulator.
The contents of the source are unaffected. Two’s complement addition is performed.
Flags: S: Set if the result is negative; cleared otherwise
Z: Set if the result is zero; cleared otherwise
H: Set if there is a carry from bit 3 of the result; cleared otherwise
V: Set if arithmetic overflow occurs, that is, if both operands are of the same sign and the
result is of the opposite sign; cleared otherwise
N: Cleared
C: Set if there is a carry from the most significant bit of the result; cleared otherwise
Addressing Execute
Mode Syntax Instruction Format Time Note
R: ADD A,R 10000-r- 2
RX: ADD A,RX 11y11101 1000010w 2
IM: ADD A,n 11000110 ——n— 2
IR: ADD A,(HL) 10000110 2+r
X: ADD A,(XY+d) 11y11101 10000110 ——d— 4+r I
Field Encodings: r: per convention
y: 0 for IX, 1 for IY
w: 0 for high byte, 1 for low byte