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Setc set control bit – Zilog Z80380 User Manual

Page 198

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5-164

Z380

U

SER

'

S

M

ANUAL

DC-8297-03

Z

ILOG

SETC
SET CONTROL BIT

SETC mode

mode = LCK, LW, XM

Operation:

if (mode = LCK) then begin

SR(1)

1

end

else if (mode = LW) then begin

SR(6)

1

end

else begin

SR(7)

1

end

When setting Lock mode (LCK), the LCK bit (bit 1) in the Select Register (SR) is set to 1,
disabling external bus requests. Note that bus requests are not disabled until after this
instruction has been executed, and that one or more of the succeeding instructions may also
have been fetched for decoding before this instruction has been executed.

When setting Long Word mode (LW), the LW bit (bit 6) in the SR is set to 1, selecting 32-bit
words. When using 32-bit words, all word load instructions transfer 32 bits.

When setting Extended mode (XM), the XM bit (bit 7) in the SR is set to 1, selecting addresses
modulo 4,294,967,296 (32 bits) as opposed to addresses modulo 65536 (16 bits) in Native
mode. In Extended mode CALL and RETurn instructions save and restore 32 bit PC values
to and from the stack, and the PC pushed to the stack in response to an interrupt is 32 bits.
In Extended mode, address manipulation instructions such as INCrement, DECrement,
ADD, and Jump Relative (JR) employ 32-bit addresses. Note that it is not possible to exit
from Extended mode except via reset.

Flags:

S:

Unaffected

Z:

Unaffected

H:

Unaffected

V:

Unaffected

N:

Unaffected

C:

Unaffected

Addressing

Execute

Mode

Syntax

Instruction Format

Time

Note

SETC mode

11mm1101 11110111

4

Field Encodings:

mm:

01 for LW, 10 for LCK, 11 for XM