Zilog Z80380 - Manual (Page 202)

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Z380 ™
U SER ' S M ANUAL
DC-8297-03
Z ILOG
SRA
SHIFT RIGHT ARITHMETIC (BYTE)
SRA dst dst = R, IR, X
Operation: tmp
←
dst
C
←
dst(0)
dst(7)
←
tmp(7)
dst(n)
←
tmp(n+1) for n = 0 to 6
The contents of the destination operand are shifted right one bit position. Bit 0 of the
destination operand is moved to the Carry flag and bit 7 remains unchanged.
Flags: S: Set if the result is negative; cleared otherwise
Z: Set if the result is zero; cleared otherwise
H: Cleared
P: Set if parity of the result is even; cleared otherwise
N: Cleared
C: Set if the bit shifted from bit 0 was a 1; cleared otherwise
Addressing Execute
Mode Syntax Instruction Format Time Note
R: SRA R 11001011 00101-r- 2
IR: SRA (HL) 11001011 00101110 2+r
X: SRA (XY+d) 11y11101 11001011 ——d— 00101110 4+r I
Field Encodings: r: per convention
y: 0 for IX, 1 for IY