Zilog Z80380 - Manual (Page 26)

4-1
Z380 ™
U SER ' S M ANUAL Z ILOG
DC-8297-03
4.1 INSTRUCTION
U SER ’s M ANUAL
C
HAPTER
4
A DDRESSING M ODES AND D ATA T YPES
An instruction is a consecutive list of one or more bytes in
memory. Most instructions act upon some data; the term
operand refers to the data to be operated upon. For Z380
™
CPU instructions, operands can reside in CPU registers,
memory locations, or I/O ports (internal or external). The
method used to designate the location of the operands for
an instruction are called addressing modes. The Z380
CPU supports seven addressing modes; Register, Imme-
diate, Indirect Register, Direct Address, Indexed, Program
Counter Relative Address, and Stack Pointer Relative. A
wide variety of data types can be accessed using these
addressing modes.
4.2 ADDRESSING MODE DESCRIPTIONS
The following pages contain descriptions of the address-
ing modes for the Z380 CPU. Each description explains
how the operand’s location is calculated, indicates which
address spaces can be accessed with that particular
addressing mode, and gives an example of an instruction
using that mode, illustrating the assembly language format
for the addressing modes.
4.2.1 Register (R, RX)
When this addressing mode is used, the instruction pro-
cesses data taken from one of the 8-bit registers A, B, C,
D, E, H, L, IXU, IXL, IYU, IYL, one of the 16-bit registers BC,
DE, HL, IX, IY, SP, or one of the special byte registers I or
R.
Storing data in a register allows shorter instructions and
faster execution that occur with instructions that access
memory.
Instruction
OPERATION
REGISTER
→
OPERAND
The operand value is the contents of the register.
The operand is always in the register address space. The
register length (byte or word) is specified by the instruction
opcode. In the case of Long Word register operation, it is
specified either through the SETC LW instruction or the
DDIR LW decoder directive.
Example of R mode:
1.
Load register in Word mode.
DDIR W ;Next instruction in Word mode
LD BC,HL ;Load the contents of HL into BC
BCz BC HLz HL
Before instruction
execution
1234 5678 9ABC DEF0
After instruction
execution
1234 DEF0 9ABC DEF0
2. Load register in Long Word mode.
DDIR LW ;Next instruction in Long Word mode
LD BC,HL ;Load the contents of HL into BC
BCz BC HLz HL
Before instruction
execution
1234 5678 9ABC DEF0
After instruction
execution
9ABC DEF0 9ABC DEF0
4.2.2 Immediate (IM)
When the Immediate addressing mode is used, the data
processed is in the instruction.
The Immediate addressing mode is the only mode that
does not indicate a register or memory address as the
source operand.