Zilog Z80380 - Manual (Page 209)

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Z380 ™
U SER ' S M ANUAL Z ILOG
DC-8297-03
SUBW
SUBTRACT (WORD)
SUBW [HL,]src src = R, RX, IM, X
Operation: HL(15-0)
←
HL(15-0) - src(15-0)
The source operand is subtracted from the HL register and the difference is stored in the
HL register. The contents of the source are unaffected. Two's complement subtraction is
performed.
Flags: S: Set if the result is negative; cleared otherwise
Z: Set if the result is zero; cleared otherwise
H: Set if there is a borrow from bit 12 of the result; cleared otherwise
V: Set if arithmetic overflow occurs, that is, if the operands are of different signs and the
result is of the same sign as the source; cleared otherwise
N: Set
C: Set if there is a borrow from the most significant bit of the result; cleared otherwise
Addressing Execute
Mode Syntax Instruction Format Time Note
R: SUBW [HL,]R 11101101 100101rr 2
RX: SUBW [HL,]RX 11y11101 10010111 2
IM: SUBW [HL,]nn 11101101 10010110 -n(low)- n(high)- 2
X: SUBW [HL,](XY+d) 11y11101 11010110 ——d— 2+r I
Field Encodings: rr: 00 for BC, 01 for DE, 11 for HL
y:
0 for IX, 1 for IY