Zilog Z80380 User Manual
Page 151
5-117
Z380
™
U
SER
'
S
M
ANUAL
Z
ILOG
DC-8297-03
OTIM
OUTPUT INCREMENT MEMORY
OTIM
Operation:
(C)
←
(HL)
C
←
C + 1
B
←
B – 1
HL
←
HL + 1
This instruction is used for block output of strings of data to on-chip peripherals. No external
I/O transaction will be generated as a result of this instruction, although the I/O address will
appear on the address bus and the write data will appear on the data bus while this internal
write is occurring. The peripheral address is placed on the low byte of the address bus and
zeros are placed on all other address lines. The byte of data from the memory location
addressed by the HL register is loaded to the on-chip I/O port addressed by the C register.
The C register, holding the port address, is incremented by one to select the next output port.
The B register, used as a counter, is then decremented by one. The HL register is then
incremented by one, thus moving the pointer to the next source for the output.
Flags:
S:
Set if the result of decrementing B is negative; cleared otherwise
Z:
Set if the result of decrementing B is zero; cleared otherwise
H:
Set if there is a borrow from bit 4 during the decrement of the B register; cleared
otherwise
P:
Set if the result of the decrement of the B register is even; cleared otherwise
N:
Set if the most significant bit of the byte transferred was a 1; cleared otherwise
C:
Set if there is a borrow from the most significant bit during the decrement of the B
register; cleared otherwise
Addressing
Execute
Mode
Syntax
Instruction Format
Time
Note
OTIM
11101101 10000011
2+r+o