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Tst test (byte) – Zilog Z80380 User Manual

Page 211

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Z380

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U

SER

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S

M

ANUAL

Z

ILOG

DC-8297-03

TST

TEST (BYTE)

TST src

src = R, IM, IR

Operation:

A AND src

A logical AND operation is performed between the corresponding bits of the source operand
and the accumulator. The contents of both the accumulator and the source are unaffected;
only the flags are modified as a result of this instruction.

Flags:

S:

Set if the most significant bit of the result is set; cleared otherwise

Z:

Set if all bits of the result are zero; cleared otherwise

H:

Set

P:

Set if the parity is even; cleared otherwise

N:

Cleared

C:

Cleared

Addressing

Execute

Mode

Syntax

Instruction Format

Time

Note

R:

TST R

11101101 00-r-100

2

IM:

TST n

11101101 01100100 ——n—

2

IR:

TST (HL)

11101101 00110100

2+r

Field Encodings:

r:

per convention

See also other documents in the category Zilog Sensors: