Altera High-Speed Development Kit, Stratix GX Edition - Manual (Page 86)

7–4 Quartus II Version 3.0 Altera Corporation
Standard Tests High-Speed Development Kit, Stratix GX Edition User Guide
The edge detection module monitors the pushbutton switches and
dipswitch 8. When it detects a rising edge from the switch, it generates a
negative pulse signal for the control logic block.
The control block has two counters that maintain the channel count and
the volume level. The channel counter is a 7-bit register that increments
or decrements when it receives a negative pulse from the channel up and
down edge detection circuits. The counter resets to 0 if you attempt to
increment when the current value is 99. The counter does a parallel load
when you enter the channel number using the dipswitches. The value is
checked for being out of range and the value loaded is adjusted as
needed. Because the counter uses a binary value, it must be processed to
generate the two digits in the display. The counter value is divided by 10.
The quotient drives the 10s digit and the remainder drives the 1s digit.
The 4-bit values for the digits are decoded to drive the individual LED
segments in the display.
The volume counter is similar. It is a 3-bit counter that increments and
decrements based on pulses from the edge detection circuits connected to
the volume up/down pushbutton switches. Because there are only six
LEDs, the counter stops at six and stays there if you attempt to increment
further. The count value is decoded by a 3-to-6 decoder to drive the LEDs.
Mictor & 20-Pin Header Logic Analyzer Interfaces
The Mictor and 20-pin headers are general-purpose I/O pins for use in
debugging designs at speed. They are intended to drive logic analyzer
input pods. The data rate is set to 200 MHz. The Mictor header is set up
as two 16-bit channels with independent clocks. For this test, both
channels are combined into one 32-bit word and both clocks are set to the
same data rate. The 20-pin header design does not include a dedicated
clock pin; the outputs are data only.
The designs for these interfaces are shift registers that drive the logic
analyzer header pins. The values are shifted left on each clock cycle with
the most significant bit (MSB) wrapping around to the least significant bit
(LSB).
The Mictor and 20-pin headers output a walking 1s pattern. The starting
pattern for the Mictor header is 32’h00010001 and the pattern looks like:
32’h00010001, 32’h00020002, 32’h00040004, 32’h00080008, 32’h00100010
etc.
Figure 7–2 shows an example of this pattern.