Inspect the board, Software requirements, Inspect the board –2 software requirements –2 – Altera High-Speed Development Kit, Stratix GX Edition User Manual
Page 18

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Quartus II Version 3.0
Altera Corporation
Inspect the Board
High-Speed Development Kit, Stratix GX Edition User Guide
Inspect the
Board
Place the board on an anti-static surface and inspect it to ensure that it has
not been damaged during shipment. Verify that all components are on
the board and appear intact.
1
The board can be damaged without proper anti-static handling.
Therefore, you should take anti-static precautions before
handling the board.
f
Refer to the Stratix GX Development Board Data Sheet for information on
the board components and their locations.
Software
Requirements
You should install the following software before you begin using the kit.
■
Quartus
®
II software version 3.0 or higher.
■
The software on the High-Speed Development Kit, Stratix GX Edition
CD-ROM.
f
Refer to “Set Up Licensing” for information on obtaining licenses for the
software.
Figure 2–1 shows the development kit directory structure on the
Stratix GX Reference Designs & Software CD-ROM.
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)