Cirrus Logic CS8422 - Manual (Page 70)

70 DS692F2
CS8422
12.6 Jitter Tolerance
The CS8422 is compliant to the jitter tolerance requirements set forth in the AES-3 and IEC60958-4 speci-
fications.
Figure 37 shows the receiver jitter tolerance template as illustrated in the AES3 and IEC60958-4
specifications along with the measured tolerance of the CS8422.
12.7 Group Delay
The group delay introduced by the CS8422 depends on the type of interface selected, and input and output sample
rates of the sample rate converter. The expression for the group delay through the CS8422 with the use of the sam-
ple rate converter is shown below, where the interface delay is 3 OLRCK periods in all modes except AES3 direct
mode, in which it is 2 OLRCK periods. If the sample rate converter is not being used, then the approximate group
delay will be equal to the interface delay.
Figure 37. Jitter Tolerance Template
TotalGroupDelay
8.7
Fsi
--------
5
Fso
--------- InterfaceDelay + +  
 
=