Cs8422 – Cirrus Logic CS8422 User Manual
Page 10
10
DS692F2
CS8422
XTI
11
Crystal/Oscillator In (Input) - Crystal or digital clock input for Master clock. See
for more details.
XTO
12
Crystal Out (Output) - Crystal output for Master clock. See
more details.
ILRCK
13
Serial Audio Input Left/Right Clock (Input/Output) - Word rate clock for the audio data on the
SDIN pin.
ISCLK
14
Serial Audio Input Bit Clock (Input/Output) - Serial bit clock for audio data on the SDIN pin.
SDIN
15
Serial Audio Input Data Port (Input) - Audio data serial input pin.
GPO[3:0]
16
17
18
30
General Purpose Outputs (Output) - See
for details. In I²C Mode, a 20 k
pull-up resistor
to VL on GPO2 will set AD2 chip address bit to 1, otherwise AD2 will be 0.
V_REG
19
Voltage Regulator In (Input) - Regulator power supply input, nominally +3.3 V.
VD_FILT
20
Digital Voltage Regulator (Output) - Digital core voltage regulator output. Should be connected to
digital ground through a 10 µF capacitor. Typically +2.5 V. Cannot be used as an external voltage
source.
DGND
21
Digital & I/O Ground (Input) - Ground for the I/O and core logic. AGND and DGND should be con-
nected to a common ground area under the chip.
VL
22
Logic Power (Input) - Input/Output power supply, typically +1.8 V, +2.5 V, +3.3 V, or +5.0 V.
SDOUT2
23
Serial Audio Output 2 Data Port (Output) - Audio data serial output 2 pin.
OSCLK2
24
Serial Audio Output 2 Bit Clock (Input/Output) - Serial bit clock for audio data on the SDOUT2
pin.
OLRCK2
25
Serial Audio Output 2 Left/Right Clock (Input/Output) - Word rate clock for the audio data on the
SDOUT2 pin.
TDM_IN
26
Serial Audio Output TDM Input (Input) - Time Division Multiplexing serial audio data input. Should
remain grounded when not used. See
“Time Division Multiplexing (TDM) Mode” on page 27
SDOUT1
27
Serial Audio Output 1 Data Port (Output) - Audio data serial output 1 pin.
OSCLK1
28
Serial Audio Output 1 Bit Clock (Input/Output) - Serial bit clock for audio data on the SDOUT 1
pin.
OLRCK1
29
Serial Audio Output 1 Left/Right Clock (Input/Output) - Word rate clock for the audio data on the
SDOUT 1 pin.
RMCK
31
Recovered Master Clock (Output) - Recovered master clock from the PLL. Frequency is 128x,
192x, 256x, 384x, 512x, 768x, or 1024x Fs, where Fs is the sample rate of the incoming AES3-
compatible data, or ISCLK/64.
RST
32
Reset (Input) - When RST is low the CS8422 enters a low power mode and all internal states are
reset. On initial power up RST must be held low until the power supply is stable and all input clocks
are stable in frequency and phase.
THERMAL PAD
-
Thermal Pad - Thermal relief pad. Should be connected to the ground plane for optimized heat dis-
sipation.
Pin Name
Pin #
Pin Description