Figure 13, Own in, Figure 16 – Cirrus Logic CS8422 User Manual
Page 28: Figure 14, Cs8422, Figure 13. tdm master mode timing diagram, Figure 14. tdm slave mode timing diagram
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DS692F2
CS8422
OLRCK
OSCLK
SDOUT/
TDM_IN
MSB
32 OSCLKs
SDOUT 4, ch A
32 OSCLKs
SDOUT 4, ch B
32 OSCLKs
SDOUT 3, ch A
32 OSCLKs
SDOUT 3, ch B
32 OSCLKs
SDOUT 2, ch A
32 OSCLKs
SDOUT 2, ch B
32 OSCLKs
SDOUT 1, ch A
32 OSCLKs
SDOUT 1, ch B
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
LSB
Data
Figure 13. TDM Master Mode Timing Diagram
OLRCK
OSCLK
SDOUT/
TDM_IN
MSB
32 OSCLKs
SDOUT 4, ch A
32 OSCLKs
SDOUT 4, ch B
32 OSCLKs
SDOUT 3, ch A
32 OSCLKs
SDOUT 3, ch B
32 OSCLKs
SDOUT 2, ch A
32 OSCLKs
SDOUT 2, ch B
32 OSCLKs
SDOUT 1, ch A
32 OSCLKs
SDOUT 1, ch B
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
LSB
Data
Figure 14. TDM Slave Mode Timing Diagram
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TDM_IN
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
PCM Source 2
OLRCK
OSCLK
SDOUT
PCM Source 1
CS8422
1
Slave
CS8422
2
Slave
LRCK
SCLK
SDIN
DSP
Master
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS8422
3
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS8422
4
Slave
OLRCK
OSCLK
SDOUT
PCM Source 3
OLRCK
OSCLK
SDOUT
PCM Source 4
Figure 15. TDM Mode Configuration (All CS8422 outputs are slave)
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TDM_IN
CS8422
1
OLRCK
OSCLK
SDOUT
PCM Source 2
OLRCK
OSCLK
SDOUT
PCM Source 1
Master
LRCK
SCLK
SDIN
DSP
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS8422
4
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS8422
2
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS8422
3
Slave
OLRCK
OSCLK
SDOUT
PCM Source 3
OLRCK
OSCLK
SDOUT
PCM Source 4
Figure 16. TDM Mode Configuration (First CS8422 output is master, all others are slave)