2 split transaction performance, 3 memory writes performance, 22 pcie ssd base address mapping – Teledyne LeCroy Summit T24 PCIe Multi-lane Protocol Analyzer User Manual User Manual
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Summit T24 PCI Express Multi‐Lane Protocol Analyzer User Manual
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PCIe SSD Base Address Mapping
Teledyne LeCroy
Time Coverage: Percentage of non‐idle symbol times in total number of symbol times.
(Non‐idle symbol time occurs when at least on one of the lanes there were non‐idle
symbols transferred.)
Bandwidth: Number of non‐idle symbol bits transferred per second.
Data Throughput: Number of TLP payload bytes transferred per second.
Packets/second: Number of packets transferred per second.
10.21.2 Split Transaction Performance
This portion of the Timing Calculator window gives minimum, maximum, and average
values for all Split transactions during the timing period. For example, minimum
throughput is throughput of the Split transaction that passes the least amount of data.
Maximum throughput is throughput of the Split transaction that passes the most amount
of data. Average throughput is the average calculated for all Split transactions during the
timing period.
Response Time: The time it took to transmit this Split transaction on the PE link, from the
beginning of the first packet in the Split transaction to the end of the last packet in the
Split transaction.
Latency: The time measured from the end of the request transaction to the first
completion transmitted in response to the request within this Split transaction.
Throughput: The transaction payload divided by response time, expressed in megabytes
per second.
10.21.3 Memory Writes Performance
This portion of the Timing Calculator window gives minimum, maximum, and average
values for all Memory Write transactions during the timing period. For example,
minimum throughput is throughput of the Memory Write transaction that passes the
least amount of data. Maximum throughput is throughput of the Memory Write
transaction that passes the most amount of data. Average throughput is the average
calculated for all Memory Write transactions during the timing period.
Response Time: The time it took to transmit this Memory Write on the PE link, from the
beginning of the first packet in the Memory Write to the end of the last packet in the
Memory Write.
Throughput: The Memory Write payload divided by response time, expressed in
megabytes per second.
10.22 PCIe SSD Base Address Mapping
In order for NVMe, PQI, AHCI and ATA command decoding to work correctly, the PETracer
software needs to know the Memory Base Address of the device. In cases when Base
Address assignment is recorded in the trace, the software will determine all the values
automatically. If the Base Address assignment is not present in the trace, you can specify
the values manually using this dialog. You need to select the type of the device (NVMe,