Rainbow Electronics AT86RF231 User Manual
Page 65
65
8111A–AVR–05/08
AT86RF231
Overview
The implemented TX_ARET algorithm is shown in
.
In TX_ARET mode, the AT86RF231 first executes the CSMA-CA algorithm, as defined by
IEEE 802.15.4-2006, section 7.5.1.4, initiated by a transmit start event. If the channel is IDLE a
frame is transmitted from the Frame Buffer. If the acknowledgement frame is requested the radio
transceiver additionally checks for an ACK reply.
The completion of the TX_ARET transmit transaction is indicated by an IRQ_3 (TRX_END)
interrupt.
Description
Configuration and address bits are to be set in TRX_OFF or PLL_ON state prior to switching to
TX_ARET mode. It is further recommended to transfer the PSDU data to the Frame Buffer in
advance. The transaction is started by either using pin 11 (SLP_TR), refer to
“Sleep/Wake-up and Transmit Signal (SLP_TR)” on page 27
, or writing a TX_START command
to register 0x02 (TRX_STATE).
If the CSMA-CA detects a busy channel, it is retried as specified by the register bits
MAX_CSMA_RETRIES (register 0x2C, XAH_CTRL_0). In case that CSMA-CA does not detect
a clear channel after MAX_CSMA_RETRIES, it aborts the TX_ARET transaction, issues inter-
rupt IRQ_3 (TRX_END), and set the value of the TRAC_STATUS reg ister bits to
CHANNEL_ACCESS_FAILURE.
During transmission of a frame the radio transceiver parses bit 5 (ACK Request) of the MAC
header (MHR) frame control field of the PSDU data (PSDU octet #1) to be transmitted to check if
an ACK reply is expected.
If an ACK is expected, the radio transceiver automatically switches into receive mode to wait for
a valid ACK reply. After receiving an ACK frame the Frame Pending subfield of that frame is
parsed and the status register bits TRAC_STATUS are updated accordingly, refer to
. This receive procedure does not overwrite the Frame Buffer content. Transmit data
in the Frame Buffer is not changed during the entire TX_ARET transaction. Received frames
other than the expected ACK frame are discarded.
If no valid ACK is received or after timeout of 54 symbol periods (864 µs), the radio transceiver
retries the entire transaction, (including CSMA-CA) until the maximum number of retransmis-
sions (as set by the register bits MAX_FRAME_RETRIES in register 0x2C (XAH_CTRL_0) is
exceeded.
After that, the microcontroller may read the value of the register bits TRAC_STATUS (register
0x02, TRX_STATE) to verify whether the transaction was successful or not. The register bits are
set according to the following cases, additional exit codes are described in
: