Rainbow Electronics AT86RF231 User Manual
Page 74
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8111A–AVR–05/08
AT86RF231
• Bit [7:0] - CSMA_SEED_0
This register contains the lower 8 bit of the CSMA_SEED, bits [7:0]. The higher 3 bit are part of
register bits CSMA_SEED_1 (register 0x2E, CSMA_SEED_1). CSMA_SEED is the seed for the
random number generation that determines the length of the back-off period in the CSMA-CA
algorithm.
It is recommended to initialize registers CSMA_SEED by random values. This can be done
using register bits RND_VALUE (register 0x06, PHY_RSSI), refer to
Register 0x2E (CSMA_SEED_1):
The CSMA_SEED_1 register is a control register for RX_AACK and contains a part of the
CSMA_SEED for the CSMA-CA algorithm.
• Bit [7:6] - AACK_FVN_MODE
The frame control field of the MAC header (MHR) contains a frame version subfield. The setting
of AACK_FVN_MODE specifies the frame filtering behavior of the AT86RF231. According to the
content of these register bits the radio transceiver passes frames with a specific frame version
number, number group, or independent of the frame version number.
Thus the register bit AACK_FVN_MODE defines the maximum acceptable frame version.
Received frames with a higher frame version number than configured do not pass the address
filter and are not acknowledged.
The frame version field of the acknowledgment frame is set to 0x00 according to IEEE 802.15.4-
2006, section 7.2.2.3.1, Acknowledgment frame MHR fields.
• Bit 5 - AACK_SET_PD
The content of AACK_SET_PD bit is copied into the frame pending subfield of the acknowledg-
ment frame if the ACK is the answer to a data request MAC command frame.
In addition, if register bits AACK_FVN_MODE (register 0x2E, CSMA_SEED_1) are configured
to accept frames with a frame version other than 0 or 1, the content of register bit
AACK_SET_PD is also copied into the frame pending subfield of the acknowledgment frame for
any MAC command frame with a frame version of 2 or 3 that have the security enabled subfield
set to 1. This is done in the assumption that a future version of the standard
might change the
Bit
7
6
5
4
3
2
1
0
+0x2E
AACK_FVN_MODE
AACK_SET_PD
AACK_DIS_ACK
AACK_I_AM_COORD
CSMA_SEED_1
CSMA_SEED_1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
0
1
0
0
0
0
1
0
Table 7-19.
Register Bit Slotted Acknowledgement Operation
Register Bit
Value
State Description
AACK_FVN_MODE
0
Acknowledge frames with version number 0
1
Acknowledge frames with version number 0 or 1
2
Acknowledge frames with version number 0 or 1 or 2
3
Acknowledge independent of frame version number