Rainbow Electronics AT75C310 User Manual
Smart internet appliance processor (siap, Features, Description
1
Features
•
ARM7TDMI
™
ARM
®
Thumb
®
Processor Core
•
Two 16-bit Fixed-point OakDSPCore
®
Cores
•
256 x 32-bit Boot ROM
•
88K Bytes of Integrated Fast RAM for Each DSP
•
Flexible External Bus Interface with Programmable Chip Selects
•
Dual Codec Interface
•
Multi-level Priority, Individually Maskable, Vectored Interrupt Controller
•
Three 16-bit Timer/Counters
•
Additional Watchdog Timer
•
Two USARTs with FIFO and Modem Control Lines
•
Industry-standard Serial Peripheral Interface
•
Up to 23 General-purpose I/O Pins
•
On-chip DRAM Controller
•
JTAG Debug Interface
•
Software Development Tools Available for ARM7TDMI and OakDSPCore
•
Supported by a Wide Range of Ready-to-use Application Software, including
Multitasking Operating System, Networking, Modems and Voice-processing Functions
•
Available in a 160-lead PQFP Package
•
3.3V Power Supply
Description
The Atmel AT75C310 Smart Internet Appliance Processor (SIAP
™
) is a high-perfor-
mance processor designed for internet appliance applications such as Internet Tele-
phony (Voice over Internet Protocol – VoIP). The AT75C310 is built around an
ARM7TDMI microcontroller core running at 20 MIPS with two DSP co-processors run-
ning at 40 MIPS each. All three processors deliver unmatched performance for low
power consumption.
In a typical standalone VoIP phone, one DSP handles the voice-processing functions
(voice compression, acoustic echo cancellation, etc.) while the other deals with the
telephony functions such as dialing, line echo cancellation, caller ID detection, high-
speed modem, etc. In such an application, the power of the ARM7TDMI allows it to
run the VoIP protocol stack as well as all the system control tasks.
Atmel provides the AT75C310 with three levels of software modules:
•
A special port of the Linux kernel as the proposed operating system
•
A comprehensive set of tunable DSP algorithms for modems and voice processing,
tailored to be run by the DSP subsystems
•
A broad range of application-level software modules such as H323 telephony or
POP-3/SMTP e-mail services
Smart Internet
Appliance
Processor
(SIAP
™
)
AT75C310 –
CPU
Peripherals
Rev. 1369A–01/01
Document Outline
- Features
- Description
- AT75C310 Pin Configuration
- AT75C310 Pin Description
- Block Diagram
- Architectural Overview
- PDC: Peripheral Data Controller
- Memory Map
- Peripheral Memory Map
- Initialization
- Boot Mode
- AT75C310 Mode Controller
- EBI: External Bus Interface
- SMC: Static Memory Controller
- External Memory Mapping
- Signal Interface
- Data Bus Width
- Byte-write or Byte-select Mode
- Read Protocols
- Write Protocol
- Wait States
- LCD Interface Mode
- SMC Register Map
- Switching Waveforms
- DMC: Dynamic Memory Controller
- DMC Operation
- Initialization Sequence
- Data Alignment
- DRAM Interface
- Write Access Followed by Burst Read Access
- Read and Write Accesses Followed by CAS before RAS Refresh
- AIC: Advanced Interrupt Controller
- PIO: Parallel I/O Controller
- USART: Universal Synchronous/Asynchronous Receiver/Transmitter
- Pin Description
- Baud Rate Generator
- Receiver
- Asynchronous Receiver
- Synchronous Receiver
- Receiver Ready
- Parity Error
- Framing Error
- Time-out
- Transmitter
- Time-guard
- Multi-drop Mode
- Break
- Transmit Break
- Receive Break
- Peripheral Data Controller
- Interrupt Generation
- Channel Modes
- Modem Control and Status Signals
- NCTS: Clear to Send
- NDCD: Data Carrier Detect
- NDSR: Data Set Ready
- NDTR: Data Terminal Ready
- NRI: Ring Indicator
- NRTS: Request to Send
- TC: Timer/Counter
- SPI: Serial Peripheral Interface
- WD: Watchdog Timer
- Dual-port Mailbox
- Assembly Source Code – Boot Program