Texas Instruments Dual/Single Socket CardBus and UntraMedia Controller PCI7621 - Manual (Page 167)

7−7
7.9 TI Extension Base Address Register
The TI extension base address register is programmed with a base address referencing the memory-mapped TI
extension registers. When BIOS writes all 1s to this register, the value read back is FFFF C000h, indicating that at
least 16K bytes of memory address space are required for the TI registers. See Table 7−8 for a complete description
of the register contents.
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name TI extension base address
Type RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name TI extension base address
Type RW RW R R R R R R R R R R R R R R
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register: TI extension base address
Offset: 14h
Type: Read/Write, Read-only
Default: 0000 0000h
Table 7−8. TI Base Address Register Description
BIT FIELD NAME TYPE DESCRIPTION
31−14 TIREG_PTR RW
TI register pointer. This field specifies the upper 18 bits of the 32-bit TI base address register. The
default value for this field is all 0s.
13−4 TI_SZ R
TI register size. This field returns 0s when read, indicating that the TI registers require a 16K-byte
region of memory.
3 TI_PF R TI register prefetch. Bit 3 returns 0 when read, indicating that the TI registers are nonprefetchable.
2−1 TI_MEMTYPE R
TI memory type. This field returns 0s when read, indicating that the TI base address register is 32 bits
wide and mapping can be done anywhere in the 32-bit memory space.
0 TI_MEM R
TI memory indicator. Bit 0 returns 0 when read, indicating that the TI registers are mapped into system
memory space.