40 diagnostic register – Texas Instruments Dual/Single Socket CardBus and UntraMedia Controller PCI7621 User Manual
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4.40 Diagnostic Register
The diagnostic register is provided for internal TI test purposes. It is a read/write register, but only 0s must be written
to it. See Table 4−18 for a complete description of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
Diagnostic
Type
RW
R
RW
RW
RW
RW
RW
RW
Default
0
1
1
0
0
0
0
0
Register:
Diagnostic
Offset:
93h (functions 0, 1)
Type:
Read/Write
Default:
60h
Table 4−18. Diagnostic Register Description
BIT
SIGNAL
TYPE
FUNCTION
7 ‡§
TRUE_VAL
RW
This bit defaults to 0. This bit is encoded as:
0 = Reads true values in PCI vendor ID and PCI device ID registers (default)
1 = Returns all 1s to reads from the PCI vendor ID and PCI device ID registers
6 ‡
RSVD
R
Reserved. This bit is read-only and returns 1 when read.
5 ‡
CSC
RW
CSC interrupt routing control
0 = CSC interrupts routed to PCI if ExCA 803 bit 4 = 1
1 = CSC interrupts routed to PCI if ExCA 805 bits 7−4 = 0000b (default).
In this case, the setting of ExCA 803 bit 4 is a don’t care.
4 ‡§
DIAG4
RW
Diagnostic RETRY_DIS. Delayed transaction disable.
3 ‡§
DIAG3
RW
Diagnostic RETRY_EXT. Extends the latency from 16 to 64.
2 ‡§
DIAG2
RW
Diagnostic DISCARD_TIM_SEL_CB. Set = 210, reset = 215.
1 ‡§
DIAG1
RW
Diagnostic DISCARD_TIM_SEL_PCI. Set = 210, reset = 215.
0 ‡
RSVD
RW
These bits are reserved. Do not change the value of these bits.
‡ This bit is cleared only by the assertion of GRST.
§ This bit is global and is accessed only through function 0.