Sasr0) -11, Sacr1 bit definitions -11, Section 14.6.3 – Intel PXA255 User Manual
Page 497: N in, Table 14-6, 3 serial audio controller i, S/msb-justified status register (sasr0)
Intel® PXA255 Processor Developer’s Manual
14-11
Inter-Integrated-Circuit Sound (I2S) Controller
14.6.3
Serial Audio Controller I
2
S/MSB-Justified Status Register
(SASR0)
SASR0, shown in
, is used for recording the status of the FIFOs and I2SLINK.
Only 4 bits are assigned for TFL and RFL. Actual fill levels are interpreted as follows:
Actual_TFL(4:0) = {~TNF, TFL(3:0)}
Actual_RFL(4:0) calculation:
if (RFL(3:0) == 4’b0)
Actual_RFL(4:0) = {RNE, RFL(3:0)}
else
Actual_RFL(4:0) = {1’b0, RFL(3:0)}
This is a read-only register. Ignore reads from reserved bits.
Table 14-6. SACR1 Bit Definitions
Physical Address
0x4040_0004
Serial Audio Controller I
2
S/MSB-
Justified Control Register
I
2
S Controller
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
reserved
ENL
B
F
DRP
L
DR
EC
re
s
e
rv
e
d
AM
S
L
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
31:6
—
reserved
5
ENLBF
Enable I
2
S/MSB Interface Loop Back Function:
0 = I
2
S/MSB Interface Loop Back Function is disabled
1 = I
2
S/MSB Interface Loop Back Function is enabled
4
DRPL
Disable Replaying Function of I
2
S or MSB-Justified Interface:
0 = Replaying Function is enabled
1 = Replaying Function is disabled
3
DREC
Disable Recording Function of I
2
S or MSB-Justified Interface:
0 = Recording Function is enabled
1 = Recording Function is disabled
2:1
—
reserved
0
AMSL
Specify Alternate Mode (I
2
S or MSB-Justified) Operation:
0 = Select I
2
S Operation Mode
1 = Select MSB-Justified Operation Mode