Intel PXA255 - Manual (Page 386)

11-2 Intel® PXA255 Processor Developer’s Manual
Fast Infrared Communication Port
11.2.1 4PPM Modulation
Four-position pulse modulation (4PPM) is used to transmit data at the high-speed rate, 4.0 Mbps.
Data bits are encoded two at a time by placing a single 125 ns light pulse in one of four timeslots.
The four timeslots are collectively termed a chip. Bytes are encoded one at a time. They are divided
into four individual 2-bit pairings called nibbles. The least significant nibble is transmitted first.
Figure 11-1 shows the 4PPM encoding for the possible 2-bit combinations and Figure 11-2 shows
an example of 4PPM modulation for the byte 0b10110001, which is constructed with four chips.
Bits within each nibble are not reordered, but nibble 0 (least significant) is transmitted first and
nibble 3 (most significant) is transmitted last.
Figure 11-1. 4PPM Modulation Encodings
Chip
Timeslots
1 2 3 4
Data = 0b00
Data = 0b01
Data = 0b10
Data = 0b11
Figure 11-2. 4PPM Modulation Example
4PPM
Data
Reordered
Nibbles
0 1 0 0 1 1 1 0
125 ns
Timeslots
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4
Chips
1 2 3 4
Receive data sample counter frequency = 6/pulse width. Each timeslot is sampled on the third clock.
Original
Byte Order
1 0 1 1 0 0 0 1
Nibble 3 Nibble 2 Nibble 1 Nibble 0
Nibble 0 Nibble 1 Nibble 2 Nibble 3
48 MHz