Intel PXA255 - Manual (Page 458)

13-8 Intel® PXA255 Processor Developer’s Manual
AC’97 Controller Unit
13.4.1.5 Slot 4: PCM Playback Right Channel
Slot 4 is the composite digital audio right playback stream. If the playback stream contains an
audio sample with a resolution that is less than 20 bits, the ACUNIT fills all trailing non-valid bit
positions with zeroes.
13.4.1.6 Slot 5: Modem Line CODEC
Slot 5 contains the MSB justified modem DAC input data if the modem line CODEC is supported.
The optional modem DAC input resolution can be implemented as 16, 18, or 20 bits. If the modem
line CODEC is supported, the ACUNIT driver determines the DAC resolution at boot time. During
normal runtime operation, the ACUNIT fills all trailing non-valid bit positions in the Slot 5 with
zeroes. The modem line CODEC may be a separate CODEC on the secondary line or it may be
integrated with the audio CODEC.
13.4.1.7 Slots 6-11: Reserved
These slots are reserved for future use. The ACUNIT fills them with zeroes.
13.4.1.8 Slot 12: I/O Control
Slot 12 contains 16 MSB bits for GPO Status (output). The following rules govern the use of Slot
12:
1. Slot 12 is initially marked invalid by default.
2. A write to address 0x54 in CODEC IO space (using Slot 1 and Slot 2 in the outgoing stream of
the present frame) results in the same write data (sent in Slot 2 of the present outgoing frame)
being sent in Slot 12 of the next outgoing frame, where Slot 12 is then marked as valid.
3. After the first write to address 0x54, Slot 12 remains valid for all subsequent frames. The data
transmitted on Slot 12 is the data last written to address 0x54. Any subsequent write to the
register sends the new data out on the next frame.
4. Following a system reset or AC’97 cold reset, Slot 12 is invalidated. Slot 12 remains invalid
until the next write to address 0x54.
13.4.2 AC-link Audio Input Frame (SDATA_IN)
The ACUNIT has two SDATA_IN lines, one primary and one secondary. Each line can have
CODECs attached. The type of CODEC attached determines which slots are valid or invalid. The
data slots on the two inputs are completely orthogonal, i.e., no two data slots at the same location
will be valid on both lines.
Multiple input data streams are received and multiplexed on slot boundaries as dictated by the slot
valid bits in each stream. Each AC-link audio input frame consists of twelve 20-bit time slots. Slot
0 is reserved and contains 16 bits that are used for AC-link protocol infrastructure.
Software must poll the first bit in the audio input frame (SDATA_IN slot 0, bit 15) for an indication
that the CODEC is in the CODEC ready state before it places the ACUNIT into data transfer
operation. When the “CODEC is ready” state is sampled, the next 12 sampled bits indicate which
of the 12 time slots are assigned to input data streams and whether they contain valid data.
Figure 13-5, “AC’97 Input Frame” illustrates the time slot-based AC-link protocol.