Intel PXA255 - Manual (Page 130)

4-26 Intel® PXA255 Processor Developer’s Manual
System Integration Unit
<22> IS22
FFUART Transmit/Receive/Error Interrupt Pending
0 – Interrupt NOT pending due to FFUART Transmit/Receive/Error.
1 – Interrupt pending due to FFUART Transmit/Receive/Error.
<21> IS21
BTUART Transmit/Receive/Error Interrupt Pending
0 – Interrupt NOT pending due to BTUART Transmit/Receive/Error.
1 – Interrupt pending due to BTUART Transmit/Receive/Error.
<20> IS20
STUART Transmit/Receive/Error Interrupt Pending
0 – Interrupt NOT pending due to STUART Transmit/Receive/Error.
1 – Interrupt pending due to STUART Transmit/Receive/Error.
<19> IS19
ICP Transmit/Receive/Error Interrupt Pending
0 – Interrupt NOT pending due to ICP Transmit/Receive/Error.
1 – Interrupt pending due to ICP Transmit/Receive/Error.
<18> IS18
I2C Service Request Interrupt Pending
0 – Interrupt NOT pending due to I2C Service Request.
1 – Interrupt pending due to I2C Service Request.
<17> IS17
LCD Controller Service Request Interrupt Pending
0 – Interrupt NOT pending due to LCD Controller Service Request.
1 – Interrupt pending due to LCD Controller Service Request.
<16> IS16
NETWORK SSP SERVICE REQUEST INTERRUPT PENDING:
0 – Interrupt NOT pending due to Network SSP Service Request.
1 – Interrupt pending due to Network SSP Service Request.
<15> — reserved
<14> IS14
AC97 Interrupt Pending
0 – Interrupt NOT pending due to AC97 unit
1 – Interrupt pending due to AC97 unit.
<13> IS13
I2S Interrupt Pending
0 – Interrupt NOT pending due to I2S unit
1 – Interrupt pending due to I2S unit.
<12> IS12
Performance Monitoring Unit (PMU) Interrupt Pending
0 – Interrupt NOT pending due to PMU unit.
1 – Interrupt pending due to PMU unit.
<11> IS11
USB Service Interrupt Pending
0 – Interrupt NOT pending due to USB service request.
1 – Interrupt pending due to USB service request.
<10> IS10
GPIO[80:2] Edge Detect Interrupt Pending
0 – Interrupt NOT pending due to edge detect on one (or more) of GPIO[80:2].
1 – Interrupt pending due to edge detect on one (or more) of GPIO[80:2].
Table 4-35. ICPR Bit Definitions (Sheet 2 of 3)
Physical Address
0x40D0_0010
ICPR System Integration Unit
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IS31 IS30 IS29 IS28 IS27 IS26 IS25 IS24 IS23 IS22 IS21 IS20 IS19 IS18 IS17
re
s
e
rved
IS14 IS13 IS12 IS1
1
IS10 IS9 IS8
re
s
e
rved
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits Name Description